Formal description techniques, IX : theory, application and tools : IFIP TC6 / 6.1 International Conference on Formal Description Techniques IX/Protocol Specification, Testing and Verification XVI, Kaiserslautern, Germany, 8-11 October, 1996 / edited by Reinhard Gotzhein and Jan Bredereke.
Material type: TextPublication details: London : published by Chapman & Hall on behalf of the International Federation for Information Processing, 1996.Description: vii, 516 p. : illISBN:- 041279490X (pbk)
Item type | Current library | Collection | Call number | Status | Date due | Barcode | |
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Books | Prof. Ram Dayal Munda Central Library | Computer Science | Available | 56043 |
Includes bibliographical references and index.
Machine generated contents note: Invited Talk I -- 1 The Video Dial Tone Service and the ATM Environment 3 -- A. Danthine -- PART ONE Tools and Tool Support -- 2 Computer-Assisted Verification of an Algorithm for -- Concurrent Timestamps 29 -- T. P. Petrov, A. Pogosyants, S. J. Garland, V Luchangco and N. A. Lynch -- 3 Design and Optimization of High-Performance Protocols with -- the DO-IT Toolbox 45 -- A. Mitschele-Thiel, P. Langendorfer and R. Henke -- 4 Tool Support for Algebraic Specifications of Data in SDL-92 61 -- N. N. Mansurov, A. S. Ragozin, A. V Chernov and I. V. Mansurov -- 5 Automating Performance Optimisation by Heuristic Analysis -- of a Formal Specification 77 -- P Hoschka -- Invited Talk II -- 6 Formal Description Techniques - How Formal and Descriptive are they? 95 -- M. Broy -- PART TWO FDT-Application -- 7 Using Formal Methods in the Development of Protocols for Multi-User -- Multimedia Systems 113 -- S. Kleuker -- 8 Formal Verification of Communication Protocols 129 -- M. A. S. Smith -- 9 Applications of Fair Testing 145 -- E. Brinksma, A. Rensink and W. Vogler -- PART THREE FDT-Based System and Protocol Engineering -- 10 Fault Models for Testing in Context 163 -- A. Petrenko, N. Yevtushenko and G. v. Bochmann -- 11 EPER: Efficient Packed Encoding Rules for ASN. 1 179 -- H. Horiuchi, T Kuroki, S. Obana and K. Suzuki -- 12 Relating Conformance Test Coverage to Formal Specifications 195 -- R. Groz, O. Charles and J. Rendvot -- PART FOUR Performance Modelling and Analysis -- 13 Performance Modelling with the Formal Specification Language SDL 213 -- M. Biitow, M. Mestern, C. Schapiro and P S. Kritzinger -- 14 The QUEST-Approach for the Performance Evaluation -- of SDL-Systems 229 -- M. Diefenbruch, J. Hintelmann and B. Miiller-Clostermann -- 15 A Formal Description Language for the Modelling -- and Simulation of Timed Interaction Diagrams 245 -- L. Braga, R. Manione and P. Renditore -- PART FIVE Real-Time and Probability Aspects -- 16 Model Reduction of Modules for State-Event Temporal Logics 263 -- M. Lawford, J. S. Ostroffand W. M. Wonham -- 17 Time-Action Alternating Model for Timed LOTOS and its Symbolic -- Verification of Bisimulation Equivalence 279 -- A. Nakata, T Higashino and K. Taniguchi -- 18 A Timed Semantics for SDL 295 -- S. M0rk, J. C. Godskesen, M. R. Hansen and R. Sharp -- 19 Implementation of Multimedia Systems based on a Real-Time -- Extension of Estelle 310 -- S. Fischer -- Invited Talk III - Abstract -- 20 Using Formal Methods: if you're so smart how come you ain't rich? 329 -- E. Brinksma -- PART SIX Verification and Validation -- 21 A New Scheme for Memory-Efficient Probabilistic Verification 333 -- U. Stern and D. L Dill -- 22 Direct Verification of Bisimulations 349 -- M. Llamas, J. Quemada and M. J. Ferndndez -- 23 Finitely Representing Infinite Reachability Graphs of CFSMs -- with Graph Grammars 364 -- Y-M. Quemener and T. Jdron -- 24 Model Checking Based on Occurrence Net Graph 380 -- J.-M. Couvreur and D. Poitrenaud -- Invited Talk IV - Abstract -- 25 Network Computing 399 -- L Mackert -- PART SEVEN Industrial Usage Reports -- 26 Validation-Based Test Sequence Generation for Networks -- of Extended Finite State Machines 403 -- S. Huang, D. Lee and M. Staskauskas -- 27 Using SDL for the Specification, Simulation and Implementation -- of an Advanced OSI Data-Link Protocol on an -- Embedded Microcontroller System 419 -- W. Kellerer, A. Iselt and R. Riek -- 28 Specification and Verification of the PowerScaleTM Bus -- Arbitration Protocol:An Industrial Experiment with LOTOS 435 -- G. Chehaibar, H. Garavel, L. Mounier, N. Tawbi and F Zulian -- 29 Combined Application of SDL-92, OMT, MSC and TTCN 451 -- E. Inocencio, M. Ricardo, H. Sato and T. Kashima -- PART EIGHT Extensions of FDTs and Semantical Foundations -- 30 On the Introduction of Exceptions in E-LOTOS 469 -- H. Garavel and M. Sighireanu -- 31 From LOTOS to Petri Nets through Iexpansion 485 -- D. Larrabeiti, J. Quemada and S. Pavdn -- 32 Comparing LOTOS and Z Refinement Relations 501 -- J. Derrick, H. Bowman, E. A. Boiten and M. W. A. Steen.
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